Title:

Characterization of SOI fabrication process using gated-diode measurements and TEM studies, Journal of Telecommunications and Information Technology, 2000, nr 3,4

Creator:

Jakubowski, Andrzej ; Tomaszewski, Daniel ; Łukasiak, Lidia ; Gibki, Jan ; Ratajczak, Jacek ; Kątcki, Jerzy

Subject and Keywords:

characterization ; microelectronics ; SOI technology

Description:

SOI fabrication process was characterized using electrical and TEM methods. The investigated SOI structures included partially and fully depleted capacitors, gated diodes and transistors fabricated on SIMOX substrates. From C-V and I-V measurements of gated diodes, the following parameters of partially depleted structures were determined: doping concentration in both n- and p-type regions, average carrier generation lifetimes in the region under the gate and generation velocity at top and bottom surfaces of the active layer. Structures with short lifetime were studied using a transmission electron microscope. TEM studies indicate that the quality of the active layer in the investigated structures is good. Moreover, these studies were used to verify the thicknesses determined by means of electrical characterization methods.

Publisher:

Instytut Łączności - Państwowy Instytut Badawczy, Warszawa

Date:

2000, nr 3,4

Resource Type:

artykuł

Format:

application/pdf

Resource Identifier:

ISSN 1509-4553, on-line: ISSN 1899-8852

DOI:

10.26636/jtit.2000.3-4.24

ISSN:

1509-4553

eISSN:

1899-8852

Source:

Journal of Telecommunications and Information Technology

Language:

ang

Rights Management:

Biblioteka Naukowa Instytutu Łączności