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Tytuł: Packet switch architecture with multiple output queueing, Journal of Telecommunications and Information Technology, 2004, nr 4

Autor:

Danilewicz, Grzegorz ; Kabaciński, Wojciech ; Kleban, Janusz ; Głąbowski, Mariusz

Data wydania:

2004, nr 4

Typ zasobu:

artykuł

Opis:

In this paper the new packet switch architecture with multiple output queuing (MOQ) is proposed. In this architecture the nonblocking switch fabric, which has the capacity of NxN2, and output buffers arranged into N separate queues for each output, are applied. Each of N queues in one output port stores packets directed to this output only from one input. Both switch fabric and buffers can operate at the same speed as input and output ports. This solution does not need any speedup in the switch fabric as well as arbitration logic for taking decisions which packets from inputs will be transferred to outputs. Two possible switch fabric structures are considered: the centralized structure with the switch fabric located on one or several separate boards, and distributed structure with the switch fabric distributed over line cards. Buffer arrangements as separate queues with independent write pointers or as a memory bank with one pointer are also discussed. The mean cell delay and cell loss probability as performance measures for the proposed switch architecture are evaluated and compared with performance of OQ architecture and VOQ architecture. The hardware complexity of OQ, VOQ and presented MOQ are also compared. We conclude that hardware complexity of proposed switch is very similar to VOQ switch but its performance is comparable to OQ switch.

Wydawca:

Instytut Łączności - Państwowy Instytut Badawczy, Warszawa

Format:

application/pdf

Identyfikator zasobu:

oai:bc.itl.waw.pl:559

DOI:

10.26636/jtit.2004.4.261

ISSN:

1509-4553

eISSN:

1899-8852

Źródło:

Journal of Telecommunications and Information Technology

Język:

ang

Prawa:

Biblioteka Naukowa Instytutu Łączności

Temat i słowa kluczowe:

multicast high-speed packet switching output queueing switching node buffer switch fabric

Kolekcje, do których przypisany jest obiekt:

Data ostatniej modyfikacji:

11 cze 2024

Data dodania obiektu:

16 mar 2010

Liczba wyświetleń treści obiektu:

1 992

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https://bc.itl.waw.pl/publication/624

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Nazwa wydania Data
Danilewicz, Grzegorz; Głąbowski, Mariusz; Kabaciński, Wojciech; Kleban, Janusz, Packet switch architecture with multiple output queueing, Journal of Telecommunications and Information Technology, 2004, nr 4 11 cze 2024

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