Object structure
Title:

The Effect of High Temperature Annealing on Fluorine Distribution Profile and Electro-Physical Properties of Thin Gate Oxide Fluorinated by Silicon Dioxide RIE in CF4 Plasma, Journal of Telecommunications and Information Technology, 2010, nr 1

Creator:

Beck, Romuald B. ; Głuszko, Grzegorz ; Kalisz, Małgorzata

Subject and Keywords:

radio frequency reactive ion etching ; current-voltagecharacteristics ; capacitance-voltage characteristics ; fluorine plasma ; high temperature annealingprocess

Description:

This study describes the effects of high temperature annealing performed on structures fluorinated during initial silicon dioxide reactive ion etching (RIE) process in CF4 plasma prior to the plasma enhanced chemical vapour deposition (PECVD) of the final oxide. The obtained results show that fluorine incorporated at the PECVD oxide/Si interface during RIE is very stable even at high temperatures. Application of fluorination and high temperature annealing during oxide layer fabrication significantly improved the properties of the interface (DitmDitmb decreased), as well as those of the bulk of the oxide layer (Qef f decreased). The integrity of the oxide (higher Vbd ) and its uniformity (Vbd distribution) are also improved.

Publisher:

Instytut Łączności - Państwowy Instytut Badawczy, Warszawa

Date:

2010, nr 1

Resource Type:

artykuł

Format:

application/pdf

Resource Identifier:

ISSN 1509-4553, on-line: ISSN 1899-8852

DOI:

10.26636/jtit.2010.1.1059

ISSN:

1509-4553

eISSN:

1899-8852

Source:

Journal of Telecommunications and Information Technology

Language:

ang

Rights Management:

Biblioteka Naukowa Instytutu Łączności

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