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Title: A Comparative Study of Single- and Dual-Threshold Voltage SRAM Cells, Journal of Telecommunications and Information Technology, 2011, nr 4

Autor:

Chaudhry, Amit ; Kushwaha, Pragya

Data wydania:

2011, nr 4

Typ zasobu:

artykuł

Opis:

In this paper, a comparison has been drawn between 5 transistor (5T), 6T and 7T SRAM cells. All the cells have been designed using both single-threshold (conventional) and dual-threshold (dual-Vt) voltage techniques. Their respective delays and power consumption have been calculated at 180 nm and 65 nm CMOS technology. With technology scaling, power consumption decreases by 80% to 90%, with some increase in write time because of the utilization of high-Vt transistors in write critical path. The results show that the read delay of 7T SRAM cell is 9% lesser than 5T SRAM cell and 29% lesser than 6T SRAM cell due to the lower resistance of the read access delay path. While read power of 5T SRAM cell is reduced by 10% and 24% as compared to 7T SRAM, 6T SRAM cell respectively. The write speed, however, is degraded by 1% to 3% with the 7T and 5T SRAM cells as compared to the 6T SRAM cells due to the utilization of single ended architecture. While write power of 5T SRAM cell is reduced by up to 40% and 67% as compared to 7T SRAM, 6T SRAM cell respectively.

Wydawca:

Instytut Łączności - Państwowy Instytut Badawczy, Warszawa

Format:

application/pdf

Identyfikator zasobu:

oai:bc.itl.waw.pl:1210 ; ISSN 1509-4553, on-line: ISSN 1899-8852

DOI:

10.26636/jtit.2011.4.1196

ISSN:

1509-4553

eISSN:

1899-8852

Źródło:

Journal of Telecommunications and Information Technology

Język:

ang

Prawa:

Biblioteka Naukowa Instytutu Łączności

Subject and keywords:

low power SRAM 6T SRAM 7T SRAM power reduction technique 5T SRAM 65 nm CMOS technology

Object collections:

Last modified:

29 sie 2024

In our library since:

26 cze 2013

Number of object content hits:

264

All available object's versions:

https://bc.itl.waw.pl/publication/1515

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Kushwaha, Pragya; Chaudhry, Amit, A Comparative Study of Single- and Dual-Threshold Voltage SRAM Cells, Journal of Telecommunications and Information Technology, 2011, nr 4 29 sie 2024
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Instytut Łączności – Państwowy Instytut Badawczy ul. Szachowa 1 04-894 Warszawa

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(+48) 5128 696

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biblioteka@il-pib.pl

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